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The 3D Shark Fin: How a 1989 Japanese Invention Rescued the Future of Microchips

Flat two-dimensional transistors leaked electrical current uncontrollably when shrunk down to nanoscale sizes; Digh Hisamoto stood the silicon channel up vertically into a three-dimensional fin wrapped on three sides by the gate. Published in 1989 and ignored for two decades while planar chips dominated, this Japanese invention gave birth to the 3D FinFET transistor powering every modern smartphone and AI processor.

Author
Digh Hisamoto et al.
Published
2003
Journal
International Technical Digest on Electron Devices Meeting
Last updated
September 2026
The 3D Shark Fin: How a 1989 Japanese Invention Rescued the Future of Microchips

In the late 1980s, computer chip manufacturing was strictly two-dimensional: transistors were printed flat on silicon wafers like ink on paper. However, physics warned that when flat transistors shrunk below one hundred nanometers, electrical current would leak right through the gate, overheating chips and ending Moore's Law.

Japanese engineer Digh Hisamoto solved this by turning the transistor into a 3D shark fin. Instead of laying the channel flat, he stood it up on its side and wrapped the electrical gate around three sides of the fin—like gripping a garden hose with both hands to shut off a leak completely.

Overlooked for twenty years until flat chips hit a physical wall in 2011, FinFET saved modern computing. By slashing electrical power leakage by ninety percent, by enabling sub-five-nanometer smartphone processors, and by powering modern artificial intelligence supercomputers, 3D transistors keep the digital revolution alive.

Reference

Hisamoto, D., Kaga, T., Kawamoto, Y., & Takeda, E. A fully depleted lean-channel transistor (DELTA)-a novel vertical ultra thin SOI MOSFET. International Technical Digest on Electron Devices Meeting, 833–836.

Title

A fully depleted lean-channel transistor (DELTA)-a novel vertical ultra thin SOI MOSFET

Abstract

A fully depleted lean channel transistor (DELTA) having a gate structure and vertical ultrathin SOI (silicon-on-insulator) structure with selective field oxide is reported. In the deep submicron region, selective oxidation is useful for achieving SOI isolation. It provides a high-quality crystal and a Si-SiO/sub 2/ interface as good as those of conventional bulk single-crystal devices. Using experiments and simulation, it was shown that the gate structure of DELTA has effective channel controllability and its vertical ultrathin (>

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